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[VM] Implemented opcodes leta, flet and fleti.

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This commit is contained in:
jtuu 2019-10-17 19:58:31 +03:00
parent da6cdc7d74
commit 4b7e03931c
1 changed files with 22 additions and 0 deletions
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22
src/quest_editor/scripting/vm/index.ts
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@ -76,6 +76,9 @@ import {
OP_WINDOW_MSG, OP_WINDOW_MSG,
OP_ADD_MSG, OP_ADD_MSG,
OP_WINEND, OP_WINEND,
OP_LETA,
OP_FLET,
OP_FLETI,
} from "../opcodes"; } from "../opcodes";
import { VirtualMachineMemoryBuffer, VirtualMachineMemory } from "./memory"; import { VirtualMachineMemoryBuffer, VirtualMachineMemory } from "./memory";
import { import {
@ -237,6 +240,7 @@ export class VirtualMachine {
case OP_THREAD.code: case OP_THREAD.code:
this.start_thread(arg0); this.start_thread(arg0);
break; break;
// integer lets
case OP_LET.code: case OP_LET.code:
this.set_register_signed(arg0, this.get_register_signed(arg1)); this.set_register_signed(arg0, this.get_register_signed(arg1));
break; break;
@ -247,6 +251,16 @@ export class VirtualMachine {
case OP_LETW.code: case OP_LETW.code:
this.set_register_unsigned(arg0, arg1); this.set_register_unsigned(arg0, arg1);
break; break;
case OP_LETA.code:
this.set_register_unsigned(arg0, this.get_register_address(arg0));
break;
// float lets
case OP_FLET.code:
this.set_register_float(arg0, this.get_register_float(arg1));
break;
case OP_FLETI.code:
this.set_register_float(arg0, arg1);
break;
case OP_SET.code: case OP_SET.code:
this.set_register_signed(arg0, 1); this.set_register_signed(arg0, 1);
break; break;
@ -582,6 +596,14 @@ export class VirtualMachine {
this.registers.write_u32_at(REGISTER_SIZE * reg, value); this.registers.write_u32_at(REGISTER_SIZE * reg, value);
} }
public get_register_float(reg: number): number {
return this.registers.f32_at(REGISTER_SIZE * reg);
}
private set_register_float(reg: number, value: number): void {
this.registers.write_f32_at(REGISTER_SIZE * reg, value);
}
private do_numeric_op_with_register( private do_numeric_op_with_register(
reg1: number, reg1: number,
reg2: number, reg2: number,